Aluminum (Al) and Al alloys are traditional metal interconnect metallurgies. While Al-based metallurgies have been the material of choice as metal interconnects in the past, concerns exist as to whether Al will meet the demands required as circuit density and speeds for semiconductor devices increase.
Copper (Cu) and Cu alloys have received considerable attention as a candidate for replacing Al in interconnect metallizations. Cu exhibits superior electromigration properties and has a lower resistivity than Al. In addition, Cu has improved electrical properties vis-a-vis W, making Cu a desirable metal for use as a conductive plug as well as conductive wiring.
Electroless plating and electroplating of Cu and Cu alloys offer the prospect of low cost, high throughput, high quality plated films and efficient via, contact and trench filling capabilities. Electroless plating generally involves the controlled autocatalytic deposition of a continuous film on the catalytic surface by the interaction in solution of a metal salt and a chemical reducing agent. Electroplating comprises the electro deposition of an adherent metallic coating on an electrode employing externally supplied electrons to reduce metal ions in the plating solution.
There are disadvantages attendant upon the use of Cu or Cu alloys. For example, Cu is easily oxidized and vulnerable to corrosion. Unlike Al, Cu does not form a self-passivating oxide on its surface. Accordingly, corrosion of Cu is an important issue which requires resolution before Cu can be effectively utilized in many semiconductor device applications. Moreover, Cu readily diffuses through silicon dioxide, the typical dielectric interlayer material employed in the manufacture of semiconductor devices, into silicon elements and adversely affects device performance.
Due to Cu diffusion through dielectric interlayer materials, such as silicon dioxide, Cu interconnect structures must be encapsulated by a diffusion barrier layer. One approach to diffusion barrier layers is to form a hybrid barrier layer, as in Jain et al., Conference Proceedings VLSI XIII, 1998 Materials Research Society, 1998. The hybrid barrier layer is produced by exposing an inter-level dielectric to a nitrogen plasma to form a layer of nitrided SiO.sub.2, and, thereafter, depositing a titanium nitride (TiN) layer by sequential thermal decomposition of metalorganic chemical vapor deposition (MOCVD) of a precursor followed by in-situ plasma densification of the film.
There exists a need for a cost effective, simplified processes enabling the formation of a protective barrier layer in Cu or Cu alloy interconnection patterns having substantially reduced or no Cu diffusion.
The present invention addresses and solves the problems attendant upon conventional multi-step, time-consuming and complicated processes for manufacturing semiconductor devices having a protective barrier layer in Cu metallization.